Abstract
Methods for testing commercial off-the-shelf (COTS) digital devices at varying levels of complexity is presented and discussed as well as the results for testing a COTS SRAM, FRAM, and SoC using these methodologies in a pulsed dose rate environment at Little Mountain Test Facility (LMTF) and neutron testing at Los Alamos Neutron Science Center (LANSCE). Investigations at LMTF revealed a dependence in all three devices on the integrated dose of a single pulse of radiation, implying that the duration of radiation plays a significant role in the response. The test infrastructure necessary to dynamically access an FRAM at LMTF and time the access with the pulse of radiation allowed for the discovery of a new FRAM failure mode where an entire word of the FRAM becomes corrupted as well as selecting between two different failure modes based on the timing of the pulse. A novel component-based testing methodology for testing complicated SoCs is presented and used to report on the cross-sections of several components on the Xilinx MPSoC, including its DMA which has not previously been reported.
Degree
MS
College and Department
Electrical and Computer Engineering
Rights
https://lib.byu.edu/about/copyright/
BYU ScholarsArchive Citation
Stirk, Wesley Raymond, "Testing Methodologies and Results of Radiation Induced Soft Errors for a COTS SRAM, FRAM, and SoC" (2023). Theses and Dissertations. 9918.
https://scholarsarchive.byu.edu/etd/9918
Date Submitted
2023-04-19
Document Type
Thesis
Handle
http://hdl.lib.byu.edu/1877/etd12756
Keywords
radiation testing, soft errors, COTS, SRAM, FRAM, SoC, MPSoC, neutrons, SEU, dose rate testing, photocurrent, integrated dose, gamma rays
Language
english