Abstract

Radiation effects encountered in space or aviation environments can affect the configuration bits in Field Programmable Gate Arrays (FPGA) causing errors in FPGA output. One method of increasing FPGA reliability in radiation environments includes adding redundant logic to mask errors and allow time for repair. Despite the redundancy added with triple modular redundancy (TMR) and configuration scrubbing there exist some configuration bits that individually affect multiple TMR domains causing errors in FPGA output. A new tool called DeBit is introduced that identifies hardware resources associated with a single bit failure. This tool identifies a novel failure mode involving global routing resources and the failure mode is verified through a series of directed tests on global routing resources. Lastly, a mitigation strategy is proposed and tested on a single error in a triple modular redundancy (TMR) design.

Degree

MS

College and Department

Ira A. Fulton College of Engineering and Technology

Rights

https://lib.byu.edu/about/copyright/

Date Submitted

2020-12-15

Document Type

Thesis

Handle

http://hdl.lib.byu.edu/1877/etd11488

Keywords

Single Event Upset, Field Programmable Gate Array, Triple Modular Redundancy, Reliability, SEU, FPGA, TMR, James D. Swift, Thesis

Language

english

Included in

Engineering Commons

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