Abstract
Modern radar technology relies heavily on digital signal processing. As radar technology pushes the boundaries of miniaturization, computational systems must be developed to support the processing demand. One particular application for small radar technology is in modern drone systems. Many drone applications are currently inhibited by safety concerns of autonomous vehicles navigating shared airspace. Research in radar based Detect and Avoid (DAA) attempts to address these concerns by using radar to detect nearby aircraft and choosing an alternative flight path. Implementation of radar on small Unmanned Air Vehicles (UAV), however, requires a lightweight and power efficient design. Likewise, the radar processing system must also be small and efficient. This thesis presents the design of the processing system for a small Frequency Modulated Continuous Wave (FMCW) phased array radar. The radar and processing is designed to be light-weight and low-power in order to fly onboard a UAV less than 25 kg in weight. The radar algorithms for this design include a parallelized Fast Fourier Transform (FFT), cross correlation, and beamforming. Target detection algorithms are also implemented. All of the computation is performed in real-time on a Xilinx Zynq 7010 System on Chip (SoC) processor utilizing both FPGA and CPU resources. The radar system (excluding antennas) has dimensions of 2.25 x 4 x 1.5 in3, weighs 120 g, and consumes 8 W of power of which the processing system occupies 2.6 W. The processing system performs over 652 million arithmetic operations per second and is capable of performing the full processing in real-time. The radar has also been tested in several scenarios both airborne on small UAVs as well as on the ground. Small UAVs have been detected to ranges of 350 m and larger aircraft up to 800 m. This thesis will describe the radar design architecture, the custom designed radar hardware, the FPGA based processing implementations, and conclude with an evaluation of the system's effectiveness and performance.
Degree
MS
College and Department
Ira A. Fulton College of Engineering and Technology; Electrical and Computer Engineering
Rights
http://lib.byu.edu/about/copyright/
BYU ScholarsArchive Citation
Newmeyer, Luke Oliver, "Efficient FPGA SoC Processing Design for a Small UAV Radar" (2018). Theses and Dissertations. 7057.
https://scholarsarchive.byu.edu/etd/7057
Date Submitted
2018-04-01
Document Type
Thesis
Handle
http://hdl.lib.byu.edu/1877/etd9981
Keywords
Efficient Computing, Phased Array Radar, FMCW Radar, Digital Beamforming, FPGA, SoC, Xilinx Zynq, Heterogeneous Processing, Hardware Acceleration, Detect and Avoid, Sense and Avoid, Unmanned Air Vehicles, Drone Technology
Language
english