Abstract
Verification and validation of embedded systems software is tedious and time consuming. Software model checking uses a tool-based approach automating this process. In order to more accurately model software it is necessary to provide hardware support that enables the execution of software as it should run on native hardware. Hardware support often requires the creation of model checking tools specific to the instruction set architecture. The creation of software model checking tools is non-trivial. We present a strategy for using an "off-the-shelf" model checking tool, Bogor, to provide support for multiple instruction set architectures. Our strategy supports key hardware features such as instruction execution, exceptional control flow, and interrupt servicing as extensions to Bogor. These extensions work within the tool framework using existing interfaces and require significantly less code than creating an entire model checking tool.
Degree
MS
College and Department
Physical and Mathematical Sciences; Computer Science
Rights
http://lib.byu.edu/about/copyright/
BYU ScholarsArchive Citation
Edelman, Joseph R., "Machine Code Verification Using The Bogor Framework" (2008). Theses and Dissertations. 1386.
https://scholarsarchive.byu.edu/etd/1386
Date Submitted
2008-05-22
Document Type
Thesis
Handle
http://hdl.lib.byu.edu/1877/etd2396
Keywords
Bogor, model checking, language extension, embedded systems verification
Language
English