Abstract

Many analog-to-digital converters (ADC) quantize inputs using a voltage-controlled-oscillator (VCO). These VCO-based ADCs leverage time-domain processing to shape quantization noise and mismatch, which further increases their appeal. Despite these advantages, achieving good performance with a VCO-based ADC remains a significant challenge due to the nonlinear transfer characteristics of the voltage-to-frequency (V-F) conversion. VCO-based ADCs widely utilize coarse-fine readout to save power and hardware compared to counter-only converters. However, the timing mismatch due to the clock skew between the coarse and fine quantizers can lead to significant reconstruction errors. Chapter 2 proposes a digital calibration circuit to detect and correct coarse-fine timing mismatch for VCO-based ADCs. The circuit includes overcount/undercount logic to detect all possible timing mismatch cases and generates a correction value to digitally remove the errors. Chapter 3 presents a VCO linearization technique for time-based ADCs which increases the input range by interpolating the VCO's V-F transfer characteristic. Utilizing multiple VCOs and exploiting the intrinsic expansive and compressive regions of the transfer characteristic, the proposed technique reduces the nonlinearity after quantization in the digital domain. Finally, Chapter 4 presents a 0.12-V 200-Hz-BW ADC based on a quad-channel VCO architecture leverages time-domain processing to overcome the extreme challenges of subthreshold operation. To demonstrate the effectiveness of our design, we implemented a prototype ADC in a 28-nm CMOS process. The measured results show that the ADC achieves an SNDR, SFDR, and DR of 57.2 dB, 66.3 dB, and 57.2 dB, respectively. The measured spectra show a 26.1 dB improvement in SFDR resulting from the proposed linearization. The power consumption of the ADC is only 72 nW with a voltage supply of 0.12 V, making it suitable for energy-constrained applications. This work represents the lowest supply reported for an ADC to the best of our knowledge.

Degree

PhD

College and Department

Ira A. Fulton College of Engineering; Electrical and Computer Engineering

Rights

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