Abstract

This dissertation presents a novel technique called duplicate with choose (DWCh) which is a modification of the fault detection technique duplicate with compare (DWC). DWCh adds a smart decider block to DWC that monitors the duplicated circuits and decides which circuit is fault free when a fault occurs. If chosen correctly, DWCh is able to mask faults at a lower cost than conventional techniques like TMR.This dissertation derives reliability expressions for DWCh showing that under ideal conditions its reliability exceeds the most commonly used fault masking technique for spacecraft, triple modular redundancy. For non-ideal conditions, DWCh provides a lower cost alternative than TMR but with lower reliability as well. Three types of DWCh smart deciders were developed for use with digital communications receivers. The first type used histograms as the statistical basis for the decider. The second type made use of moments for decision. The third type, although not generally applicable to other systems, used a signal common to communications receivers with excellent results. The communications receivers were subjected to hardware fault injection to gather datastreams affected by real world faults. The captured datastreams were used with Simulink models of the different deciders to quantify their performance and discover how a practical implementation of DWCh differs from the theoretical model. The increase in mean time to failure for DWCh when compared to simplex ranged from 20x to 130x depending on the specific smart decider tested.

Degree

PhD

College and Department

Ira A. Fulton College of Engineering and Technology; Electrical and Computer Engineering

Rights

http://lib.byu.edu/about/copyright/

Date Submitted

2016-06-01

Document Type

Dissertation

Handle

http://hdl.lib.byu.edu/1877/etd8807

Keywords

reliability, fault mitigation, fault injection, concurrent error detection, DWC, DWCh, FPGA

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