Abstract

As FPGA densities continue to improve, single chips are becoming capable of implementing larger and more complex systems. Even today these systems may include several processors working in conjuction with a handful of other standard interfaces or custom modules. Additional system complexity naturally leads to added complexity throughout the different design and implementation stages. Attempting to design such a system while maintaining high performance and within a reasonable time frame is becoming more and more difficult. Architectural design approaches ranging from direct module interconnection to sophisticated bus schemes have been used to build such systems, all with their own trade-offs. Often direct module interconnection results in the best overall performance but at the cost of design time and flexibility. Bus schemes on the other hand attempt to simplify the integration of the different hardware modules and allow for a more modular design approach. However, since the bus is a single shared interconnection medium, a practical limit is placed on the system's acheivable throughput. A relatively new architectural approach to system design involves a network-based communication infrastructure. A network-based interconnect scales much better than the shared bus and provides a potential increase in system throughput capabilites. An effective approach would be one that can provide the throughput capabilities of direct interconnect, the modular design advantages of the shared bus, and the flexibility to adapt to different system requirements while maintaining lightweight communication. A design infrastructure that attempts to meet these requirements has been developed. This infrastructure is based on a circuit-switched network architecture. The circuit-switching aspect allows two nodes, or modules, to temporarily establish a direct and dedicated connection for high-throughput data transfer. The network-based topology allows this to occur without tying up all the interconnect resources as other routes can be used to connect the other nodes. Each node is connected to the network via a well-defined interface therefore allowing for modular design. Flexibility is built into the architecture to accommodate many different topology configurations. Lightweight protocols and handshaking mechanisms are used to establish node-to-node connections, and initiate and terminate data transfers. Two different example applications have been implemented with this network-based interconnect: one that involves the use of a single resource that must be shared among different modules, and another that has high system bandwidth requirements and dynamically schedules the use of functionally identical resources. These implementations were then compared against that of a bus- ased approach. Both applications illustrate the effectiveness of this network architecture in SoC implementation.

Degree

MS

College and Department

Ira A. Fulton College of Engineering and Technology; Electrical and Computer Engineering

Rights

http://lib.byu.edu/about/copyright/

Date Submitted

2005-04-13

Document Type

Thesis

Handle

http://hdl.lib.byu.edu/1877/etd799

Keywords

circuit-switched, network, architecture, FPGA, system, SOC, NOC

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