Journal of Undergraduate Research
Keywords
synchronous data link control, SDLC, communication chip
College
Ira A. Fulton College of Engineering and Technology
Department
Electrical and Computer Engineering
Abstract
In conjunction with the ORCA research grant I was able to design, layout and simulate an integrated Synchronous Data Link Control (SDLC) communication chip. SDLC communication chips are commonly used to transfer data between computers in serial bit-wise transmission. Extensions of the SDLC are used in high speed data links and satellite communication. In addition, this project was accompanied with full web documentation such that the VLSI Design Class (ECEn 451) can leverage my research and design as a class project.
Recommended Citation
Barney, C. Alva and Wilde, Dr. Doran K.
(2013)
"Synchronous Data Link Control Communication Chip,"
Journal of Undergraduate Research: Vol. 2013:
Iss.
1, Article 1873.
Available at:
https://scholarsarchive.byu.edu/jur/vol2013/iss1/1873