Abstract

SRAM-Based FPGAs provide valuable computation resources and reconfigurability; however, FPGA designs can fail during operation due to ionizing radiation. As an SRAM-based device, these FPGAs store operation-critical information in configuration RAM, or CRAM. Testing, through radiation tests, can be performed to prove the effectiveness of SEU mitigation techniques by comparing the SEU sensitivity of an FPGA design with and without the mitigation techniques applied. However, radiation testing is expensive and time-consuming. Another method for SEU sensitivity testing is through fault injection. This work describes a low-cost fault injection platform for evaluating the SEU sensitivity of an SRAM-based FPGA design by emulating faults in the device CRAM through partial reconfiguration. This fault injection platform, called the TURTLE, is designed to gather statistically significant amounts of fault injection data to test and validate SEU mitigation techniques for SRAM-based FPGAs. Across multiple fault injection campaigns, the TURTLE platform was used to inject more than 600 million faults to test SEU mitigation techniques, estimate design SEU sensitivity, and validate radiation test data through fault injection.

Degree

MS

College and Department

Ira A. Fulton College of Engineering and Technology

Rights

https://lib.byu.edu/about/copyright/

Date Submitted

2021-06-09

Document Type

Thesis

Handle

http://hdl.lib.byu.edu/1877/etd11663

Keywords

FPGA, Fault injection, SEU mitigation, SEU sensitivity

Language

english

Included in

Engineering Commons

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