Abstract

Here explored is a method by which designers can use the tool of topology optimization to numerically improve barriers to reverse engineering. Recently developed metrics, which characterize the time (T) to reverse engineer a product, enable this optimization. A key parameter use din the calculation of T is information content (K). The method presented in this thesis pursues traditional topology optimization objectives while simultaneously maximizing K, and thus T, in the resulting topology. This thesis presents new algorithms to 1) evaluate K for any topology, 2)increase K for a topology by manipulating macro-scale geometry and micro-scale crystallographic information for each element, and 3) simultaneously maximize K and minimize structural compliance(a traditional topology optimization objective). These algorithms lead designers to desirable topologies with increased barriers to reverse engineering. It is concluded that barriers to reverse engineering can indeed be increased without sacrificing the desirable structural characteristic of compliance. This has been shown through the example of a novel electrical contact for a consumer electronics product.

Degree

MS

College and Department

Ira A. Fulton College of Engineering and Technology; Mechanical Engineering

Rights

http://lib.byu.edu/about/copyright/

Date Submitted

2013-05-15

Document Type

Thesis

Handle

http://hdl.lib.byu.edu/1877/etd6174

Keywords

reverse engineering, topology optimization, barriers to reverse engineering

Share

COinS